ICT114 TMA (Tutor-Marked Assignment) SUSS : July 2024 Semester Presentation – Computer Architecture Tutor-Marked Assignment

Question 1

A digital system uses 8-bit for integer representation and 16-bit for floating-point number representation. Analyse the various number representations and answer the following questions.

(a) Given A = 4B16 and B = 7C16.

(i) If 8-bit sign-magnitude representation is used to represent integers, what is the range of decimal values it can represent? Show your working.

(ii) Express the value of A and the value of B in 8-bit binary if sign-magnitude representation is used for integers.

(iii) Show how the digital system computes the logic operation A XOR (A OR B). Express the result in hexadecimal.

(b) Given X = 7710 and Y = -8810.

(i) Express the value of X and the value of Y in 8-bit binary if sign-magnitude representation is used for integers. Show your working.

(ii) Express the value of X and the value of Y in 8-bit binary if 2’s complement signed integer representation is used. Show your working.

(iii) Find the result of X + Y by performing the computation in 2’s complement arithmetic. Convert the result to decimal and show it is equal to -11. Show your working.

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(c) The hexadecimal number C0FE represents a 16-bit floating point number. Its representation is given in Figure Q1(c). What is the decimal value? Show your working.

Figure Q1(c)

Question 2

(a) Figures Q2(a)(i) and Q2(a)(ii) show the main components and expanded structure, respectively, of a computer with a Princeton Institute for Advanced Studies (IAS) architecture.

Figure Q2(a)(i) Main Components of an IAS Computer

Figure Q2(a)(ii) Expanded Structure of IAS Computer

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Demonstrate the process the processor must undertake to READ a value from main memory. In your description, you must make reference to the Memory Address Register (MAR), Memory Buffer Register (MBR), address bus, data bus and control bus. For the control bus, line(s) that is/are asserted during the operation should be included.

(b) Describe TWO (2) problems with instruction pipelining.

(c) Array and linked list are two common data structures used in software development. Describe and illustrate with the aid of a diagram, how data is stored in main memory for each data structure.

Question 3

This question is based on the EASY68K simulated processor. Assume the contents of all data and address registers are equal to zero before the start of the program. All numbers are in hexadecimal.

Demonstrate how instructions of a program are executed by using the E114 Processor Instruction Set of the EASY68K simulator.

Figure Q3 is a program segment for the course’s simulated processor. Assume all numbers are in hexadecimal

(a) The program includes a loop. Which register is being used as a loop counter and how many times in total will the set of instructions within the loop be executed?

(b) From which instruction(s) do you deduce the answers in Q3(a)?

(c) The loop picks up successive data items from a block of locations in data memory. What are the lowest and highest addresses in hexadecimal of the locations in this block?

(d) What is the function of the block of instructions that make up the loop in the program? Do not give a description on an instruction by instruction level; give the overall task of the loop.

(e) Rewrite the program in Figure Q3 using a subroutine and test its functionality. The subroutine should perform the functions of the loop. The subroutine occupies memory space just below the main program. Use SUBR as the subroutine address label.

Initialise and use test data: 1, 2, 3, … up to the loop counter deduced in Q3(a). Assume the contents of all data registers are set to zero before the start of the program. (Reminder: All numbers including the test data are in hexadecimal.)

Test your program with the course’s simulator. Once it is working correctly, copy the codes and pastes your program to your MS WORD answer document. Your submission should be like the format given in Figure Q3. Do not submit a screenshot of the program.

(f) Submit a screen shot of the memory contents that include addresses from 5E0 to 670 when the program stops. Use the instructions given below to obtain the screen shot.

Instructions:

1. To view the memory contents at the simulator screen, click on the View menu and select Memory. Click on the Page down button to the required addresses. Verify that the memory contents are indeed correct

2. To capture the ‘screenshot’ select the window, press + on your computer keyboard, and then paste it onto your word document. Your submission should be like the sample given in Figure Q3(f).

(g) Identify the addressing modes for the following instructions used by E114 simulator.

(i) MOVE.W $600, D2
(ii) MOVE.B #$600, A1
(iii) ADD.B (A1)+, D2

(h) What is a stack? Describe TWO (2) important usages of a stack.

Question 4

(a) Figure Q4(a) shows the memory map of a computer system. Each addressed location can store a byte or 8 bits.

(i) Calculate the number of memory locations this computer system can address. Express your answer in power of 2. Explain your answer. No credit will be awarded if answer is not supported with explanation or working

(ii) Calculate the capacity of the two memories and unused space as given in Figure Q4(a) in Kbytes.

(b) The characteristics of a hypothetical magnetic disk drive is shown in Figure Q4(b).

(i) Explain and compute the storage capacity of the drive in Gbytes. Show your
working.

(ii) Explain and calculate the average access delay for the drive in milliseconds.
Express your answer to 6 decimal places. Show your working.

(iii) Derive the maximum data transfer rate in Mbytes per second. Express your
answer to 2 decimal places. Show your working.

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The post ICT114 TMA (Tutor-Marked Assignment) SUSS : July 2024 Semester Presentation – Computer Architecture Tutor-Marked Assignment appeared first on Singapore Assignment Help.

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